1. Field of the Invention
The present invention relates to an array substrate and a method for manufacturing the same and, more particularly, to an array substrate in which a wiring of a pad region is formed without an insulating film or without an insulating film and an organic film to reduce abnormal operations due to an increase in resistance caused by a contact margin in a high temperature environment, and a method for manufacturing the same.
2. Description of the Related Art
As information society is advancing, demand for display devices for displaying images is increasing in various forms, and recently, various flat display devices such as a liquid crystal display (LCD), a plasma display panel (PDP), an organic light emitting diode (OLED), and the like, have been utilized.
Among the flat display devices, an LCD device having advantages in that it is smaller, lighter, and thinner and is operated with low power consumption has been commonly used.
In general, an LCD device displays an image by adjusting light transmittance of liquid crystal having dielectric anisotropy by using a field.
An LCD device includes a color filter substrate, an array substrate, and a liquid crystal layer formed between the color filter substrate and the array substrate.
Hereinafter, a structure of a general LCD device will be described in detail with reference to FIGS. 1 to 3. FIG. 1 is a view illustrating a connection relationship between a liquid crystal panel and a flexible circuit board. FIG. 2A is an enlarged view of a portion ‘A’ in FIG. 1. FIG. 2B is a plan view of a second electrode layer 16 in FIG. 1. FIG. 2C is a sectional view taken along line I-I′ in FIG. 2B. FIG. 3 is a view illustrating a connection relationship between an array substrate and a flexible circuit board.
As illustrated in FIGS. 1 to 3, the related art array substrate 10 includes a pad region (a) and a thin film transistor (TFT) formation region (b). A first electrode layer 12, an insulating film 14, and a second electrode layer 16 are sequentially formed on a substrate 10 of the pad region (a). Here, the first electrode layer 12 is formed together when data wirings including source and drain electrodes are formed in the TFT formation region (b) and made of the same material as that of the data wirings. Also, the insulating layer 14 includes a gate insulating film and a protective film, and formed together when a gate insulating film and a protective film are formed in the TFT formation region (b) and made of the same material as that of the gate insulating film and the protective film. The second electrode layer 16 is formed together when a pixel electrode is formed in the TFT formation region (b) and made of the same material as that of the pixel electrode. Here, a plurality of connection electrodes (not shown) is formed on the second electrode layer 16 and electrically connected to the flexible circuit board 70.
A plurality of TFTs (not shown) are formed on the substrate 10 of the TFT formation region (b), and a common electrode 32 is formed on a color filter substrate 30 disposed to correspond to the array substrate 10.
Meanwhile, in the liquid crystal panel, in order to receive a driving signal provided from a printed circuit board (PCB) (not shown), the pad region (a) of the array substrate 10 is electrically connected to the flexible circuit board 70. Here, a driving chip 74 is mounted on the flexible circuit board 70, and in this case, for example, a gate driving chip or a data driving chip may be mounted on the flexible circuit board 70.
A connection wiring 76 is formed on the flexible circuit board 70 and electrically connected to the pad region (a) of the array substrate 10, and in this case, the connection wirings 76 equal to the number of connection electrodes formed in the pad region (a) of the array substrate 10 may be formed.
The pad region (a) of the array substrate 10 and the connection wiring 76 of the flexible circuit board 70 are attached by an anisotropic conductive film (ACF) 50. Thus, a driving signal provided from the PCB is delivered to the TFT formed in the TFT formation region (b) through the connection wiring 76 of the flexible circuit board 70, the ACF 50, and a plurality of connection electrodes formed in the pad region (a) of the array substrate 10.
As illustrated in FIG. 2A, a plurality of connection electrodes 16_1 through 16_5 are formed on the second electrode layer 16 of the pad region (a) of the array substrate 10, and a plurality of contact holes 15 are formed to be in contact with the ACF 50.
As illustrated in FIGS. 2B and 2C, when a gate electrode is formed in the TFT formation region (b), the first electrode layer 12 is also formed together in the pad region (a) of the substrate 10 by using the same material as that of the gate electrode. The insulating layer 14 comprised of the gate insulating film 14a and the protective film 14b is formed together on the first electrode layer 12 when the gate insulating film and the protective film are formed in the TFT formation region (b). A contact hole 15 is formed to expose a certain region of the first electrode 12. The connection electrode 16-1 electrically connected to the exposed first electrode layer 12 on the insulating layer 14. Here, the connection electrode 16_1 is formed together when the pixel electrode is formed in the TFT formation region (b) and made of the same material as that of the pixel electrode.
As illustrated in FIG. 3, when the liquid crystal panel is operated at room temperature in a state in which the plurality of connection electrodes 16_1 to 16_5 of the pad region (a) of the array substrate 10 are attached to the connection wiring 76 of the flexible circuit board 70 by the ACF 50, there is no problem with the operation of the liquid crystal panel. However, when the liquid crystal panel is operated at a high temperature, the number of contact points P1 to P4 at which the connection electrodes 16_1 through 16_5 of the pad region (a) and the connection wiring of the flexible circuit board 70 are in contact is reduced. For example, assuming that the liquid crystal panel is operated at a room temperature and the number of contact points at which the connection electrodes 16_1 through 16_5 of the pad region (a) and the connection wiring of the flexible circuit board 70 is 10. However, when the liquid crystal panel is operated in a high temperature environment, the number of contact points P1 through P4 at which the connection electrodes 16_1 to 16_5 of the pad region (a) and the connection wiring of the flexible circuit board 70 is reduced to 4.
Thus, abnormal operation of the liquid crystal panel and defective data line occur at a high frequency. An electrical defect is also generated as contact resistance between the connection electrodes 16_1 through 16_5 of the pad region (a) and the connection wiring of the flexible circuit board 70 is high.